So there must have been barriers to PCM becoming a commercial reality. The first such barrier is write current. PCM cells write bits by melting glass at 600° C. It doesn’t take much imagination to understand that there’s some appreciable amount of power required to do this, particularly at 1970 lithographic sizes. Today, 90nm and 45nm PCM cells require much less write current than 40 years ago, but the amount of current is still not negligible.

Next, there are mechanical issues associated with repeatedly melting a material inside of an integrated circuit. Eventually, voids can form in the melt zone resulting in cell destruction. Fortunately, the failure related to this mechanism always occurs at write time, so the cells can be read after a write to verify that a failure has not occurred.

There are also issues associated with operating temperature. High-temperature PCM operation tends to anneal PCM bits set to the amorphous state. Numonyx says that the retention time for its PCM cells is on the order of 10 years at 85° C. However, it’s 10 hours at 125° C, 10 seconds at 165° C, and 10 microseconds at 225° C. This problem isn’t insurmountable, but it must be understood and addressed by system designers.

Note that all memory technologies have similar problems. NAND Flash memory has well-understood wearout mechanisms. Because they’re well understood, system designers working with NAND Flash memory have little trouble incorporating them into their designs. Novice designers—well that’s a different story.

PCM manufacture involves introducing “foreign” elements (not silicon) from the periodic table into the IC-manufacturing process. Normally, this is something IC manufacturers avoid at all costs, but the material being introduced is glass—albeit something called chalcogenide (pronounces “kal-KAW-gen-ide”) glass—composed of germanium, antimony, and tellurium. The glass is pretty inert, so it apparently doesn’t present too many contamination problems that would absolutely preclude the material’s use in IC manufacturing.

If you’re an electrical engineer, it’s likely you’ve never heard of chalcogenide glass, but it’s one of the most closely studied materials with one of the highest manufacturing volumes in high tech—just not in electronics. A chalcogenide glass layer is the active component in recordable CDs and DVDs. In its crystalline form, the glass is highly reflective. In its amorphous form, the glass is not so reflective, resulting in a nice, binary, optical-storage mechanism. In an optical disk burner, laser-induced thermal heating switches the glass from one state to the other. A fast, strong laser pulse disrupts a spot of sputtered crystalline material and causes it to become amorphous, reducing its reflectivity. You can see the difference if you look closely at a written disk.

These optical differences between the crystalline and amorphous states are essential to recordable, optical-disk operation but they’re not at all relevant to PCM data storage. However, the chalcogenide glass also has measurably different resistance between the crystalline and amorphous states. The crystalline form of the glass has relatively low resistivity and the amorphous form has higher resistivity, until the glass melts. Now you’re talking memory.

You can see the differential resistivity between the crystalline and amorphous states at low “read” voltages in the figure below. At higher voltages, the glass heats and starts to melt. At that point, the crystalline and amorphous V/I curves merge as the glass starts to soften and melt.

PCM cells exploit this V/I curve, which is conceptually similar to the hysteresis curve for magnetic memories. A fast, high-voltage pulse melts a spot of glass in the PCM cell through Joule heating. Joule heating causes a small amount of chalcogenide material to switch from amorphous to crystalline or back again depending on the size and shape of the write pulse (as shown in the following diagram). Once the pulse is removed, quick cooling allows the glass to solidify in amorphous form. A longer, less intense voltage pulse anneals the glass and puts in the crystalline state.

A PCM cell is pretty simple as shown below. The memory cell resides between a bit electrode and a word electrode. The cell itself consists of a current-limiting/heating resistor and a dot of polycrystalline chalcogenide glass. Current flow through this structure and the amount of that current depends on the voltage impressed on the word and bit lines. When the current is high enough, a region of glass next to the resistor (the dark gray mushroom cap atop the resistor in the figure) starts to melt. The PCM chip’s read/write control circuitry controls the size, shape, and timing of the write pulse.

It’s the simplicity of this mechanism and of the PCM cell design that excites chip makers like Intel, Numonyx, and the other vendors chasing after the 4-decade dream of a new form of semiconductor memory.

However, don’t get the impression that this is a trouble-free memory poised to wipe out all existing semiconductor memories overnight. Won’t happen. If this was simple stuff, PCM would have won the semiconductor memory wars long ago. That obviously didn’t happen. Why? Tune in for the next installment.

PCM can’t perform the same trick of packing multiple bits per cell that Flash does by using variable amounts of charge to represent two, three, or four bits on one cell. One of the known and required enabling technologies for PCM to become cost-competitive with Flash memory is the ability to physically stack multiple bit cells to create 3D PCM devices. That’s precisely what researchers from Intel and Numonyx announced last week. Researchers from the two companies—who have been working on PCM together long before Numonyx spun out as a in independent company in 2008 after starting as a joint partnership between Intel and STMicrolectronics—said they will be presenting a paper at next month’s IEDM conference on a test chip that implements stackable (but not yet stacked) PCM cells.

The stackable PCM cell consists of a chalcogenide memory cell and another chalcogenide device called an Ovonic Threshold Switch (OTS), which was developed by Stanford Ovshinsky more than 40 years ago. Ovshinsky is the all-time, grandmaster alchemist of silicon. His specialty is the study of amorphous silicon, essentially glass, and he has found an incredible number of uses for this material. Both elements in the PCM memory cell announced by Intel and Numonyx owe their existence to Ovshinsky.

The OTS is a 2-terminal breakover device. Insufficiently excited, an OTS doesn’t conduct electricity. With a large enough electric field across it, the OTS quickly becomes a conductor. Reduce the field below the threshold and it becomes nonconducting again. It’s a diode-like device made without a semiconductor junction. In addition, an OTS is made of similar stuff to the PCM memory cell itself: chalcogenide glass. Consequently, an OTS makes a great cell selector for a PCM bit cell. The Intel/Numonyx test chip sandwiches a PCM memory cell and an OTS between a row and column line to create a stackable PCM memory cell. Energize the row and column lines sufficiently and current will flow through the OTS. That’s all that’s needed to create a stackable PCM cell, according to the announcement.

AgigA Tech specializes in fusing fast DRAM with non-volatile semiconductor memory to create bulletproof memory subsystems for embedded systems and servers. Currently, the non-volatile semiconductor memory of choice is Flash EEPROM because of the tremendously advantageous cost/bit, data-retention time, and raw bit-storage capacity. However, Flash may not always be king of the non-volatile hill and so it’s important to stay on top of non-volatile memory developments such as the one announced last week by Intel and Numonyx.