After 40 years of working on phase-change memory (PCM), researchers announced…another incremental step towards creating devices that can compete with the current king of the non-volatile memory hill: Flash EEPROM. Certainly, there are PCM devices on the market now (see this blog and this one on the EDN site). However Flash memory, already the cost/bit memory leader by far, has threatened to leave all other memory technologies far, far in the dust as it evolves from single-layer cells (SLC) to multi-layer cells (MLC). But there’s trouble visible on the far horizon for Flash memory. The number of electrons stored in a Flash cell drops with each new lithography node and we will soon be using the charge difference between the presence and absence of a few dozen electrons to distinguish a bit. Scary.

PCM can’t perform the same trick of packing multiple bits per cell that Flash does by using variable amounts of charge to represent two, three, or four bits on one cell. One of the known and required enabling technologies for PCM to become cost-competitive with Flash memory is the ability to physically stack multiple bit cells to create 3D PCM devices. That’s precisely what researchers from Intel and Numonyx announced last week. Researchers from the two companies—who have been working on PCM together long before Numonyx spun out as a in independent company in 2008 after starting as a joint partnership between Intel and STMicrolectronics—said they will be presenting a paper at next month’s IEDM conference on a test chip that implements stackable (but not yet stacked) PCM cells.

The stackable PCM cell consists of a chalcogenide memory cell and another chalcogenide device called an Ovonic Threshold Switch (OTS), which was developed by Stanford Ovshinsky more than 40 years ago. Ovshinsky is the all-time, grandmaster alchemist of silicon. His specialty is the study of amorphous silicon, essentially glass, and he has found an incredible number of uses for this material. Both elements in the PCM memory cell announced by Intel and Numonyx owe their existence to Ovshinsky.

The OTS is a 2-terminal breakover device. Insufficiently excited, an OTS doesn’t conduct electricity. With a large enough electric field across it, the OTS quickly becomes a conductor. Reduce the field below the threshold and it becomes nonconducting again. It’s a diode-like device made without a semiconductor junction. In addition, an OTS is made of similar stuff to the PCM memory cell itself: chalcogenide glass. Consequently, an OTS makes a great cell selector for a PCM bit cell. The Intel/Numonyx test chip sandwiches a PCM memory cell and an OTS between a row and column line to create a stackable PCM memory cell. Energize the row and column lines sufficiently and current will flow through the OTS. That’s all that’s needed to create a stackable PCM cell, according to the announcement.

AgigA Tech specializes in fusing fast DRAM with non-volatile semiconductor memory to create bulletproof memory subsystems for embedded systems and servers. Currently, the non-volatile semiconductor memory of choice is Flash EEPROM because of the tremendously advantageous cost/bit, data-retention time, and raw bit-storage capacity. However, Flash may not always be king of the non-volatile hill and so it’s important to stay on top of non-volatile memory developments such as the one announced last week by Intel and Numonyx.